The JDP signed with IMEC strengthens SET's involvement in global research efforts hold in the field of the 3D wafer-level packaging and 3D stacked-ICs to explore innovative solutions for the cost-effective use of 3D interconnects. Through the delivery of the FC300 (first quarter of 2009), SET maintains its leadership position based on several decades of die bonding expertise and its commitment to offer unsurpassed sub-micron bonding capabilities combined with superior flexibility. Enjoy reading this newsletter!
SET, Smart Equipment Technology, a leading supplier of high accuracy die-to-die (D2D), die-to-wafer (D2W) bonding and nanoimprint lithography solutions will collaborate with IMEC, one of Europe’s leading independent nanoelectronics research institutes, on the development of die pick-and-place and bonding processes for 3D chip integration, using SET's FC300 High Force & High Accuracy Device Bonder.
"Assembly Strategies for 3D-IC Integration: Wafer to Wafer vs Chip to Wafer."
⇒ With the advent of 3D integration concepts as a potential enabler for the continuation of Moore's law, the aligned wafer bonding requirements have shifted significantly. Chip-to-wafer bonding and wafer reconstruction represent solutions to improve yield and chip size flexibility; the two methods are detailed in this presentation made at Semicon Japan 2008.
"SET received the Georg-Waeber-Prize for Innovation 2008"
⇒ Georg-Waeber Prize for Innovation 2008 was given to Dr. Matthias Rommel and Mr Holger Schmitt, from the Fraunhofer-IISB, Mr Michael Hornung from SUSS MicroTec and Mr. Gilbert Lecarpentier from SET.
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